By "JINZ Port-E" of Port-E = 0xFF or "JDNZ Port-E" of Port-E = 0x00,
Port-F is not changed.
Are these only case that Port-F is not affected by Port-E carry or borrow?
The multi-byte address carry/borrow is affected by the following instructions.
(1) ADD r,A
(2) ADC r,A
(3) SUB r,A
(4) SUBB r,A
(5) INC r
(6) DEC r
(7) JINZ r,addr
(8) JDNZ r,addr
(Note: 1. The multi-byte address means PCH:PCM:PCL
But LCDARH:LCDARL and BSR:FSR0 can NOT carry into/borrow from high byte
2. The "r" include of PCL,TABPTRL,PORTE and FSR1
But if "r=TABPTRM" or "r= PCM", the carry into/borrow from high byte address will
3. We don't suggest to use the DINZ PCL,addr or DJNZ PCL,addr instruction )
Please explain about the STKPTR operation.
The STKPTR value points at the high byte address of current level.
(1) When reset, the STKPTR=0x00
(2) After first CALL instruction,
0xFE==> store high byte PC address
0xFF==> store low byte PC address
(3) After first RET instruction,
High byte PC address restore from 0xFE
Low byte PC address restore from 0xFF
How to setup the unused general I/O to avoid current consumption?
Please set the PortA with pull up enable and other Port to output LOW.
That will reduce the floating current.
How to archive Indirect Jump in NEW CPU series?
You can archive Indirect jump by ADD PCL,A instruction
Carry bit of PCL will automatic carry into PCM:PCH .
The Instruction cycle of write to PC(program counter) takes TWO cycle.
How many cycles will TBRD instruction takes?
TBRD instruction will take 2 cycles at first time, and then 1 cycle at following TBRD
Ex1. TBRD 1,reg1 e Take 2 cycles
TBRD 1,reg2 e Take 1 cycle
TBRD 1,reg3 e Take 1 cycle
TBRD 1,reg99 e Take 1 cycle
TBRD 1,reg100 e Take 2 cycles
TBRD 1,reg101 e Take 1 cycle
Ex2. MOV A,#10
TBRD 1,INDF1 e Repeat 10 times, total take 11 cycles