Specification
Overview
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General Description
The EM78P134N is an 8-bit microprocessor designed and developed with low-power and high-speed CMOS technology. It has an on-chip 2k x 13-bit Electrical One Time Programmable Read Only Memory (OTP-ROM). It provides three protection bits to prevent intrusion of user's OTP memory code as well as from unwanted external accesses. Several code option bits are available to meet user's requirements. With its enhanced OTP-ROM feature, the EM78P134N provides a convenient way of developing and verifying user's programs. Moreover, this OTP device offers the advantages of easy and effective program updates, using development and programming tools. User can avail of the ELAN Writer to easily program his development code.
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Features & Benefits
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CPU Configuration
- 1K x 13 bits on-chip ROM
- 48 bytes on-chip registers (SRAM, general purpose)
- 5-level stacks for subroutine nesting
- Less than 1.5 mA at 5V/IRC 4 MHz
- Typically 15 µA at 3V/32kHz
- Typically 1 µA during Sleep mode
- 3 programmable level voltage reset (LVR):4.0V, 3.3V 2.4V
- Power-on reset (POR): 1.8V
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I/O Port Configuration
- 1 bidirectional I/O port: P6
- Wake-up port: P6
- 3 programmable pull-down I/O pins
- 7 programmable pull-high I/O pins
- 7 programmable open-drain I/O pins
- External interrupt: P60
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Operating Voltage Range
- 2.1V~5.5V at 0°C~70°C (Commercial Grade)
- 2.3V~5.5V at -40°C~85°C (Industrial Grade)
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Operating Frequency Range
- Crystal Mode: DC~20MHz/2clks@5V; DC~8MHz/2clks@3V; DC~4MHz/2clks@2.1V
- ERC Mode: DC~16MHz/2clks@4.5V; DC~12 MHz/2clks@4V; DC~4MHz/2clks@2.1V
- IRC Mode: 455kHz, 4MHz, 8MHz, 16MHz ±3%@25°C, 5V
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Peripheral Configuration
- 8-bit real time clock/counter (TCC) with selective signal sources, trigger edges and overflow interrupt
- One comparator (typical offset voltage 10mV when input voltage range 0.5V~4.5V) with Cin+/internal Vref level select and Cin- 3 channel switch
- One Pulse Width Modulation (PWM) with 10-bit resolution
- High EFT immunity
- Power down mode (Sleep mode)
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Five Available Interrupts
- TCC overflow interrupt
- Input-port status changed interrupt (wake-up from sleep mode)
- External interrupt
- PWM period match completion
- Comparator output change interrupt
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Other Features
- Programmable prescaler of oscillator set-up time
- One security register to prevent intrusion of user's OTP memory code
- One configuration register to match user's requirement
- Two clocks per instruction cycle
- TBRD instruction
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Data Sheet
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Download File
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Package
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Download File
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Technical Information
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Website Link
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